1. Field of the Invention
The current invention relates to integrated circuit devices, and in particular, to the testing of integrated circuit devices.
2. Related Art
An integrated circuit (IC) device may comprise many miniaturized circuits implemented in a semiconductor substrate. IC devices must be tested in order to ensure proper operation before they are used. IC devices can be tested in a limited fashion using built-in self test (BIST) circuitry that is implemented within the IC devices themselves. BIST testing, however, is incomplete and does not test all aspects of the device's operation. Thorough testing of an IC device is accomplished with complex and expensive external testing equipment.
As the complexity and clock speeds of ICs increase, the capabilities of existing external testing equipment can become a limiting factor in the testing of new ICs. For example, the clock speeds of the fastest memory devices increase on almost an annual basis. These memory devices cannot be tested at their maximum clock speeds using older testing equipment that was built for testing slower memory. In addition, the length of the cables between existing external testing equipment and the ICs under test (on the order of one to five meters) results in input signals to the IC device having slew rates too slow to reliably test parameters such as minimum set-up and hold times. Because of their cost, it is impractical to purchase new testing equipment with each advance in clock speeds. There is, therefore, a need for improved systems and methods of testing integrated circuits.